Research Fellow, University of Warwick


Publications

  • 2008

  1. Costas Argyrides, Fabian Vargas, Dhiraj Pradhan, Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement. IEEE International On-Line Testing Symposium. July 2008.
  2. Costas Argyrides, Stephania Loizidou-Himona, Dhiraj Pradhan “Area Reliability trade-off in Improved Reed Muller Coding” SAMOS VIII Workshop, Samos, Greece, July 23-26, 2008
  3. Costas Argyrides, Stephania Loizidou-Himona, Dhiraj Pradhan “ Yield Improvement and Power Aware Low Cost Memory Chips” Workshop on Radiation Effects and Fault Tolerance in Nanometer Technologies at Computing Frontiers 2008, Ischia, Italy, May 3-5 , 2008
  4. Carlo Lisboa, Costas Argyrides, Dhiraj Pradhan, Luigi Carro, Algorithm Level Fault Tolerance: a Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms. IEEE VLSI Test Symposium (VTS) 2008, San Diego California, USA, 27th April 2008
  5. Costas Argyrides, Fabian Vargas, Dhiraj Pradhan, Merging Built-in Current Sensor with H-Tree Architecture for SRAM Reliability Improvement, Proceedings of IEEE Latin American Test Workshop (LATW), Puebla Mexico, 17-20 February 2008.
  6. J. Mathew, Costas Argyrides, A. M Jabir, D. K. Pradhan “Single Error Correcting Finite Field Multipliers over GF(2m)”, Proceedings of 21st Conference on VLSI Design

  • 2007

  1. Costas Argyrides, Lisbôa, C., Carro, L., D.K. Pradhan “Working at Algorithm Level to Minimize Recomputation Time when Coping with Long Duration Transients” DECIDE 2007, Rio, Brasil December 15-17, 2007
  2. Costas Argyrides, D. K. Pradhan, A. Al-Yamani “High Defect Tolerant Low Cost Memory Chips”, Proceedings of IEEE International System on Chip Conference (SOCC 07), Hsinchu, Taiwan, 26-29 Sept. 2007
  3. Costas Argyrides, D.K. Pradhan “Improved Decoding Algorithm for High Reliable Reed Muller Coding” Proceedings of IEEE International System on Chip Conference (SOCC 07), Hsinchu, Taiwan, 26-29 Sept. 2007
  4. Costas Argyrides, H.R. Zarandi, D.K. Pradhan, “Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories” Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems 2007, Rome, Italy, 26-28 Sept 2007
  5. Costas Argyrides, D.K. Pradhan “Novel Soft Error Robust Power Aware Memory Designs” International IEEE East West Design & Test Symposium (EWDTS’ 07), Yerevan, Armenia, 7-10 September 2007.
  6. Costas Argyrides, D.K. Pradhan “Yield Improvement for High Defect Rate Nanotechnology Circuits” International IEEE East West Design & Test Symposium (EWDTS’ 07), Yerevan, Armenia, 7-10 September 2007.
  7. Costas Argyrides, Lisbôa, C., Carro, L., D.K. Pradhan “A Soft Error Robust and Power Aware Memory Design”, in Proceedings of the 20th Symposium on Integrated Circuits and Systems Design - SBCCI 2007, September 2007.
  8. Costas Argyrides, D.K. Pradhan, “Highly Reliable Power Aware Memory Design” Proceedings of IEEE International On-Line Testing Symposium 2007 (IOLTS), Hersonisos of Heraklion, Crete, Greece, July 20-24, 2007.
  9. Costas Argyrides, “High Defect Tolerant Robust Memory Designs” Proceedings of DSN Student Forum, Edinburgh, UK, June 25-28, 2007.
  10. H.R. Zarandi, S.G. Miremadi, Costas Argyrides, D.K. Pradhan, ” Online Detection and Correction of Soft-Errors in LUTs of SRAM-based FPGAs” Proceedings of European Test Symposium (ETS), Freiburg, Germany, May 20-24, 2007.
  11. Costas Argyrides, H.R. Zarandi, D.K. Pradhan,An “Efficient Method to Tolerate Multiple Bit Upsets in SRAM Memory” Proceedings of European Test Symposium (ETS), Freiburg, Germany, May 20-24, 2007
  12. Costas Argyrides, H.R. Zarandi, D.K. Pradhan, “Multiple Upsets Tolerance in SRAM Memory,” Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), New Orleans, USA, 27-30 May, 2007.
  13. H.R. Zarandi, S.G. Miremadi, Costas Argyrides, D.K. Pradhan, “CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs ,” Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS) ,New Orleans, USA, 27-30 May, 2007.
  14. Costas Argyrides, Ramsundar S, D. K. Pradhan, A. Al-Yamani “Non-square Meshes for Improved Yield in Nanotechnology Circuits” Proceedings of IEEE Latin American Test Workshop (LATW), Cuzco, Peru, 11 - 14, March 2007
  15. Costas Argyrides, Demetriou S, D. K. Pradhan, “Fast Reed Muller Decoding for Multi-Bit Upset Aware Memory Designs ” Proceedings of IEEE Latin American Test Workshop (LATW), Cuzco, Peru, 11 - 14, March 2007
  16. H.R. Zarandi, S.G. Miremadi, Costas Argyrides, D.K. Pradhan, “Fast SEU Detection and LUT Configuration Bits of SRAM-based FPGAs,” Proceedings of 14th IEEE Reconfigurable Architecture Workshop, in association with IPDPS, California, USA, 26-27 March, 2007.

  • 2006

  1. Costas Argyrides, Jimson Mathew, Ahmad A. Al-Yamani, Dhiraj K. Pradhan “Performance Analysis of an Error Tolerant Low Power Memory Architecture” IEEE International Design and Test Workshop, 19-20 November 2006, Dubai
  2. Bijoy A.J. , Babita R. J. , Juothish S,Costas Argyrides, J. Mathew, “A Fault Tolerant Multiplier less Decimation Filter” International Conference on Embedded Systems, Mobile Communication and Computing, August 4th -5th 2006, Bangalore, India. (Best Paper Award)
Print This Page Print This Page   Email This Page Email This Page


Post a comment